1. Field of the Invention
The present invention relates to a process for manufacturing integrated power devices having surface corrugations and to an integrated power device having surface corrugations.
2. Discussion of the Related Art
As is known, integrated power devices should frequently meet severe requirements as regards both the maximum current and the reverse breakdown voltage. These requirements necessitate providing devices of considerable dimensions, which contrasts with the increasingly felt need to reduce the area occupied. The dimensions of power devices are particularly critical when also low-voltage devices are integrated in one and the same die. In these cases, in fact, more than 70% of the area available can be occupied by power devices.
For power devices there is hence posed the problem of obtaining a large area available for conduction, without sacrificing the overall dimensions.
It has been proposed to provide surface corrugations in the active areas so as to extend the conduction surface with respect to a plane surface with the same footprint.
In a lateral DMOS transistor, for example, the corrugations can be defined by projections and depressions that extend parallel to one another in a direction parallel to a line that joins the source regions and the drain regions. Projections and depressions are hence parallel also to the direction of flow of the current.
The corrugations are made as follows.
Before the body, source, and drain implantations are carried out, as well as that of the gate region, a semiconductor wafer in which the devices are to be formed is selectively etched with a mask to form parallel trenches, in a direction that joins a first region, intended to accommodate source regions, and a second region, intended to accommodate drain regions. Parallel projections are defined between adjacent trenches. A channel region, designed for conduction, extends in a band that traverses the projections and the trenches.
The surface of the wafer in the channel region is defined by a succession of parallel portions and of oblique portions. The profile of a section transversely to the projections and to the trenches is hence corrugated, and its development is greater than that of a plane surface without corrugations.
In known devices, however, the semiconductor surface in the electrically active region is deteriorated by the etches made to form the corrugations. Furthermore, the profile of the corrugations can be controlled only in a rather approximate way. Consequently, as a whole, the yield of the manufacturing processes is not satisfactory, and the effective levels of performance of the devices can easily depart from the nominal values.